SCLS009G March 1984 – July 2022 SN54HCT373 , SN74HCT373
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight latches of the ’HCT373 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low,the Q outputs are latched at the levels that were set up at the D inputs.
PART NUMBER | PACKAGE(1) | BODY SIZE (NOM) |
---|---|---|
SN74HCT373DW | SOIC (20) | 12.80 mm × 7.50 mm |
SN74HCT373N | PDIP (20) | 25.40 mm × 6.35 mm |
SN74HCT373NSR | SO (20) | 15.00 mm × 5.30 mm |
SN74HCT373PW | TSSOP (20) | 6.50 mm × 4.40 mm |
SN54HCT373J | CDIP (20) | 26.92 mm × 6.92 mm |
SNJ54HCT373FK | LCCC (20) | 8.89 mm × 8.45 mm |
SNJ54HCT373W | CFP (20) | 13.72 mm × 6.92 mm |