SDLS146B October   1976  – September 2016 SN54LS245 , SN74LS245

 

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 3-State outputs
      2. 9.3.2 PNP Inputs
      3. 9.3.3 Hysteresis on Bus Inputs
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resource
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • W|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

When using multiple bit logic devices, inputs must not be left floating. In many applications, some channels of the SNx4LS245 are unused, and thus must be terminated properly. Because each transceiver channel pin can be either an input or an output, they must be treated as both when being terminated. Ground or VCC (whichever is more convenient) can be used to terminate unused inputs; however, each unused channel should be terminated to the same logic level on both the A and B side. For example, in Figure 7 unused channels 4, 5, 6, and 7 are terminated correctly with both sides connected to the same voltage, while channel 8 is terminated incorrectly with each side being tied to a different voltage. The OE input is also unused in this example, and is terminated directly to ground to permanently enable all outputs.

12.2 Layout Example

SN54LS245 SN74LS245 sdls146_layout2.gif Figure 7. Example Demonstrating How to Terminate Unused Inputs and Channels of a Transceiver