SCAS285AC March   1993  – April 2022 SN54LVC14A , SN74LVC14A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions: SN54LVC14A
    4. 6.4  Recommended Operating Conditions: SN74LVC14A
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics, SN54LVC14A
    7. 6.7  Electrical Characteristics, SN74LVC14A
    8. 6.8  Switching Characteristics, SN54LVC14A
    9. 6.9  Switching Characteristics, SN74LVC14A
    10. 6.10 Operating Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 8.3.2 CMOS Schmitt-Trigger Inputs
      3. 8.3.3 Clamp Diodes
      4. 8.3.4 Over-Voltage Tolerant Inputs
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • J|14
  • FK|20
  • W|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from Revision AB (June 2015) to Revision AC (April 2022)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Removed the Standard CMOS Inputs sectionGo
  • Added the CMOS Schmitt-Trigger Inputs sectionGo
  • Removed Δt/Δv specifications throughout the data sheetGo

Changes from Revision AA (June 2015) to Revision AB (January 2019)

  • Changed order of the 'Features' list Go
  • Deleted "Ioff Support Live Insertion, Partial-Power-Down Mode and Back Drive protection" from Features listGo
  • Deleted Device Options table, see Mechanical, Packaging, and Orderable Information at the end of the data sheetGo
  • Added VO > VCC to Output clamp current in Absolute Maximum Ratings Go
  • Changed MAX value for Output clamp current, IOK from: –50 to: ±50 Go
  • Changed values in the Thermal Information table to align with JEDEC standardsGo
  • Added Feature Description sections for Balanced High-Drive CMOS Push-Pull Outputs, Standard CMOS Inputs, Clamp Diodes, and Over-Voltage Tolerant Inputs Go
  • Added Related Documentation and Receiving Notification of Documentation Updates sectionsGo

Changes from Revision Z (January 2014) to Revision AA (June 2015)

  • Added Applications, Device Information table, Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Moved Tstg to Absolute Maximum Ratings table.Go

Changes from Revision Y (October 2010) to Revision Z (January 2014)

  • Updated document to new TI data sheet format.Go
  • Updated Features Go
  • Added Military Disclaimer to Features listGo