SLLSFI8 February   2021 SN55LVCP22A-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Select Pins
      2. 8.3.2 Output Enable Pins
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Current-Mode Logic (CML)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 Single-Ended (LVPECL)
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
      4. 9.2.4 Low-Voltage Differential Signaling (LVDS)
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
      5. 9.2.5 Cold Sparing
      6. 9.2.6 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Device Functional Modes

Table 8-1 Function Table
SEL0 SEL1 EN0 EN1 OUT0 OUT1 FUNCTION SIGNAL FLOW
0 0 1 1 IN0 IN0 1:2 Splitter
Input IN0		 1:2 Splitter GUID-B2A51D6C-996F-409B-AB0D-C7A40DE2D55A-low.png
1 1 1 1 IN1 IN1 1:2 Splitter
Input IN1		 1:2 Splitter GUID-592E5EA9-8ECF-42C3-B9F6-58A4DD704295-low.png
0 1 1 1 IN0 IN1 2-lane Repeater Dual Repeater GUID-ABB93FC4-5190-4411-AE4A-C5B73BD28EAB-low.gif
1 0 1 1 IN1 IN0 Cross-switch 2 X 2 Crosspoint GUID-1B1174D5-7090-46F5-8D82-2481C4350368-low.gif
GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png
0
GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png		 X 1 0 GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png
IN0
GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png		 High-Z 2:1 Mux Output OUT0 2:1 Mux GUID-18D1520C-BB52-4AA4-8185-218A07D6AA8C-low.png
1 IN1
X GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png
0
GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png		 0 1 High-Z GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png
IN0
GUID-CBB48A53-0375-409E-9C94-C56D585863AB-low.png		 2:1 Mux
Output OUT1		 2:1 Mux GUID-DF4F5E2B-D2D8-4F99-95C7-68FBF64A0228-low.png
1 IN1