SLLSFI8 February   2021 SN55LVCP22A-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Select Pins
      2. 8.3.2 Output Enable Pins
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Current-Mode Logic (CML)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 Single-Ended (LVPECL)
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
      4. 9.2.4 Low-Voltage Differential Signaling (LVDS)
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
      5. 9.2.5 Cold Sparing
      6. 9.2.6 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Parameter Measurement Information

GUID-BFF435B9-DBA7-431F-92F9-D061C87FB56B-low.gif Figure 7-1 Equivalent Input and Output Schematic Diagrams
GUID-217DD922-0D29-4D9C-AD21-6CF29CA8F621-low.gif Figure 7-2 Voltage And Current Definitions
GUID-E73F974C-E031-405B-84F3-C5FC38BF7271-low.gif Figure 7-3 Differential Output Voltage (VOD) Test Circuit
GUID-4FDC2989-DD5B-47F6-96F7-356C13CCDA01-low.gif
All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse-repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ±10 ns; RL = 100 Ω; CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.; the measurement of VOC(PP) is made on test equipment with a –3 dB bandwidth of at least 300 MHz.
Figure 7-4 Test Circuit And Definitions For The Driver Common-Mode Output Voltage
GUID-D35E0ABA-0BCC-45CB-93E7-73B354371D1F-low.gif
All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ .25 ns, pulse-repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.
Figure 7-5 Timing Test Circuit And Waveforms
GUID-47D893FC-6D28-48F0-A29D-53D5268D0FDB-low.gif
All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, pulse-repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.
Figure 7-6 Enable And Disable Time Circuit And Definitions
Table 7-1 Receiver Input Voltage Threshold Test
APPLIED VOLTAGES RESULTING DIFFERENTIAL
INPUT VOLTAGE		 RESULTING COMMON-
MODE INPUT VOLTAGE		 OUTPUT(1)
VIA VIB VID VIC
1.25 V 1.15 V 100 mV 1.2 V H
1.15 V 1.25 V –100 mV 1.2 V L
4.0 V 3.9 V 100 mV 3.95 V H
3.9 V 4. 0 V –100 mV 3.95 V L
0.1 V 0.0 V 100 mV 0.05 V H
0.0 V 0.1 V –100 mV 0.05 V L
1.7 V 0.7 V 1000 mV 1.2 V H
0.7 V 1.7 V –1000 mV 1.2 V L
4.0 V 3.0 V 1000 mV 3.5 V H
3.0 V 4.0 V –1000 mV 3.5 V L
1.0 V 0.0 V 1000 mV 0.5 V H
0.0 V 1.0 V –1000 mV 0.5 V L
(1) H = high level, L = low level
GUID-D912395F-51FD-4FD6-B9C3-B7D5CD45E7EA-low.gif
tSET and tHOLD times specify that data must be in a stable state before and after mux control switches.
Figure 7-7 Input To Select For Both Rising And Falling Edge Setup And Hold Times