SLLSFI8 February   2021 SN55LVCP22A-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Select Pins
      2. 8.3.2 Output Enable Pins
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Current-Mode Logic (CML)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
      3. 9.2.3 Single-Ended (LVPECL)
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
      4. 9.2.4 Low-Voltage Differential Signaling (LVDS)
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
      5. 9.2.5 Cold Sparing
      6. 9.2.6 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Typical Characteristics

GUID-DEB17357-D033-447F-9F1A-8632F74907EB-low.png
VCC = 3.3 VTA = 25°C
Figure 6-1 Differential Output Voltage vs Resistive Load
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VCC = 3 V - 3.6 VVIC = 1.2 V|VID| = 300 mV
Input = 1 MHz
Figure 6-3 Propagation Delay Time bs Ffree-Air Temperature
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VCC = 3.3 VTA = 25°CVIC = 400 mV
Input = PRBS 223 −1
Figure 6-5 Peak-To-Peak Jitter vs Data Rate
GUID-5FF45B2F-C322-46E7-B6E3-76DD1CBEF32D-low.png
VCC = 3.3 VTA = 25°CVIC = 1.2 V
Input = PRBS 223 −1
Figure 6-7 Peak-To-Peak Jitter vs Data Rate
GUID-6EA18E11-B56D-4283-B6F0-AFC38ABD63A8-low.png
VCC = 3.3 VTA = 25°CVIC = 1.6 V
Input = PRBS 223 −1
Figure 6-9 Peak-To-Peak Jitter vs Data Rate
GUID-7078DBBA-00DC-4D5B-B4EE-3807ADA667E7-low.png
VCC = 3.3 VTA = 25°CVIC = 3.3 V
Input = PRBS 223 −1
Figure 6-11 Peak-To-Peak Jitter vs Data Rate
GUID-C1935538-E847-44DB-975D-90EEFA08A094-low.png
VCC = 3.3 VTA = 25°CVIC = 1.2 V
|VID| = 200 mVInput = PRBS 223 −1
Figure 6-13 Peak-To-Peak Jitter vs Data Rate
GUID-695ED350-E79D-4374-8BD0-F2839CB353B0-low.png
VCC = 3.3 VTA = 25°CVIC = 1.2 V
|VID| = 200 mV
Figure 6-2 Supply Current vs Frequency
GUID-4076CB3F-BB10-4C7C-94E5-C5E38281BEA4-low.png
VCC = 3.3 VTA = 25°CVIC = 400 mV
Input = Clock
Figure 6-4 Peak-To-Peak Jitter vs Frequency
GUID-467CF6A9-6AB8-4469-A743-6A0BAC0BA187-low.png
VCC = 3.3 VTA = 25°CVIC = 1.2 V
Input = Clock
Figure 6-6 Peak-To-Peak Jitter vs Frequency
GUID-B2E5A1BF-F726-4538-97E4-15E5942D877C-low.png
VCC = 3.3 VTA = 25°CVIC = 1.6 V
Input = Clock
Figure 6-8 Peak-To-Peak Jitter vs Frequency
GUID-10E9F58C-9463-4F01-AC9E-1896616644D1-low.png
VCC = 3.3 VTA = 25°CVIC = 3.3 V
Input = Clock
Figure 6-10 Peak-To-Peak Jitter vs Frequency
GUID-ACC2B029-020E-428E-A99F-179B4EF90AAE-low.png
VCC = 3.3 VTA = 25°CVIC = 1.2 V
|VID| = 200 mV
Figure 6-12 Differential Output Voltage vs Frequency