SLLS101H July   1985  – December 2021 SN65176B , SN75176B

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Electrical Characteristics – Driver
    5. 6.5 Electrical Characteristics – Receiver
    6. 6.6 Switching Characteristics – Driver
    7. 6.7 Switching Characteristics – Receiver
    8. 6.8 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Driver
      2. 7.3.2 Receiver
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Powered
      2. 7.4.2 Device Unpowered
      3. 7.4.3 Symbol Cross Reference
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • P|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Switching Characteristics – Driver

VCC = 5 V, RL = 110 Ω, TA = 25°C (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
td(OD)Differential-output delay timeRL = 54 Ω, see Figure 7-31522ns
tt(OD)Differential-output transition timeRL = 54 Ω, see Figure 7-32030ns
tPZHOutput enable time to high levelSee Figure 7-485120ns
tPZLOutput enable time to low levelSee Figure 7-54060ns
tPHZOutput disable time from high levelSee Figure 7-4150250ns
tPLZOutput disable time from low levelSee Figure 7-52030ns