SLLSFC4 July   2019 SN65C1168E-SEP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Block Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Driver Section Electrical Characteristics
    6. 6.6 Receiver Section Electrical Characteristics
    7. 6.7 Driver Section Switching Characteristics
    8. 6.8 Receiver Section Switching Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Active High Driver Output Enables
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Driver Section Electrical Characteristics

over recommended supply voltage and operating free-air temperature ranges (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK Input clamp voltage II = –18 mA –1.5 V
VOH High-level output voltage VIH = 2 V, VIL = 0.8 V, IOH = –20 mA 2.4 3.5 V
VOL Low-level output voltage VIH = 2 V, VIL = 0.8 V, IOL = 20 mA 0.2 0.4 V
|VOD1| Differential output voltage 1 IO = 0 mA 2 6 V
|VOD2| Differential output voltage 2 RL = 100 Ω, see Figure 1(2) 2 3.7 V
Δ|VOD| Change in magnitude of
differential output voltage		 RL = 100 Ω, see Figure 1(2) –0.4 0.4 V
VOC Common-mode output voltage RL = 100 Ω, see Figure 1(2) –3 3 V
Δ|VOC| Change in magnitude of
common-mode output voltage		 RL = 100 Ω, see Figure 1(2) –0.4 0.4 V
IO(OFF) Output current with power off VCC = 0 V VO = 6 V 100 μA
VO = –0.25 V 100
IO(OFF) Output current with power off(5) VCC = 0 V VO = 6 V 3 mA
VO = –0.25 V 3
IOZ High-impedance-state output current VO = 2.5 V 20 μA
VO = 5 V –20
IOZ High-impedance-state output current(5) VO = 2.5 V 2 mA
VO = 5 V –2
IIH High-level input current VI = VCC or VIH 1 μA
IIL Low-level input current VI = GND or VIL –36 μA
IOS Short-circuit output current VO = VCC or GND(3) –30 –160 mA
ICC Supply current (total package) No load,
Enabled		 VI = VCC or GND 4 6 mA
VI = 2.4 or 0.5 V(4) 5 9
ICC Supply current (total package)(5) No load,
Enabled		 VI = VCC or GND 17 mA
VI = 2.4 or 0.5 V(4) 16
Ci Input capacitance 6 pF
(1) All typical values are at VCC = 5 V and TA = 25°C.
(2) Refer to TIA/EIA-422-B for exact conditions.
(3) Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
(4) This parameter is measured per input, while the other inputs are at VCC or GND.
(5) 25°C only. Post 20-krad(Si) HDR TID using worst case static biasing.