SLLSEO9D March 2016 – October 2024 SN65DPHY440SS , SN75DPHY440SS
PRODUCTION DATA
The DPHY440 supports three levels of receive equalization to compensate for ISI loss in the channel. These three levels are 0 dB, 2.5 dB, and 5 dB at 750MHz. The equalization level used by the DPHY440 is determined by the state of the EQ/SCL pin at the rising edge of RSTN. If necessary, the receiver equalization level can also be set through writing to the RXEQ register via the local I2C interface
EQ/SCL PIN | HS RX EQUALIZATION |
---|---|
≤ VIL | 0 dB |
VIM | 2.1 dB at 500 MHz / 2.5 dB at 750 MHz |
≥ VIH | 4 dB at 500 MHz / 5 dB at 750 MHz |