SLLSEO9D
March 2016 – October 2024
SN65DPHY440SS
,
SN75DPHY440SS
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics, Power Supply
5.6
Electrical Characteristics
5.7
Timing Requirements
5.8
Switching Characteristics
5.9
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
HS Receive Equalization
6.3.2
HS TX Edge Rate Control
6.3.3
TX Voltage Swing and Pre-Emphasis Control
6.3.4
Dynamic De-skew
6.4
Device Functional Modes
6.4.1
Shutdown Mode
6.4.2
LP Mode
6.4.3
ULPS Mode
6.4.4
HS Mode
6.5
Register Maps
6.5.1
BIT Access Tag Conventions
6.5.2
Standard CSR Registers (address = 0x000 - 0x07)
6.5.3
Standard CSR Register (address = 0x08)
6.5.4
Standard CSR Register (address = 0x09)
6.5.5
Standard CSR Register (address = 0x0A)
6.5.6
Standard CSR Register (address = 0x0B)
6.5.7
Standard CSR Register (address = 0x0D)
6.5.8
Standard CSR Register (address = 0x0E)
6.5.9
Standard CSR Register (address = 0x10) [reset = 0xFF]
6.5.10
Standard CSR Register (address = 0x11) [reset = 0xFF]
7
Application and Implementation
7.1
Application Information,
7.2
Typical Application, CSI-2 Implementations
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Reset Implementation
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Receiving Notification of Documentation Updates
8.2
Support Resources
8.3
Trademarks
8.4
Electrostatic Discharge Caution
8.5
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHR|28
MPQF243A
Thermal pad, mechanical data (Package|Pins)
RHR|28
QFND246D
Orderable Information
sllseo9d_oa
sllseo9d_pm
1
Features
MIPI®
DPHY 1.1 specification compliant
Enables low-cost cable solutions
Supports up to 4 lanes at 1.5Gbps
CSI-2/DSI clock rates
from 100MHz to 750MHz
Sub mW Power in shutdown state
MIPI®
DSI bidirectional LP mode supported
Supports for both ULPS and LP power states
Adjustable output voltage swing
Selectable TX pre-emphasis levels
Adjustable RX EQ to compensate for ISI loss
Configurable edge rate control
Dynamic data and clock skew compensation
ESD HBM protection: 3kV
Industrial temperature range: –40°C to 85°C (SN65DPHY440SS)
Commercial temperature range: 0°C to 70°C (SN75DPHY440SS)
Available in single 1.8V supply