SLLS934F November   2008  – November 2015 SN65HVD11-HT

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Driver Electrical Characteristics
    6. 6.6 Receiver Electrical Characteristics
    7. 6.7 Driver Switching Characteristics
    8. 6.8 Receiver Switching Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low-Power Standby Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D, JD, or HKJ Package
8-Pin SOIC, PDIP, or CFP
Top View
SN65HVD11-HT po_lls505.gif
HKQ Package
8-Pin CFP
Top View
SN65HVD11-HT hkq_po_lls934.gif

Pin Functions

PIN TYPE DESCRIPTION
NAME SOIC,
PDIP		 HKQ
A 6 6 Bus input/output Driver output or receiver input (complementary to B)
B 7 7 Bus input/output Driver output or receiver input (complementary to A)
D 4 4 Digital input Driver data input
DE 3 3 Digital input Active-high driver enable
GND 5 5 Reference potential Local device ground
R 1 1 Digital output Receive data output
RE 2 2 Digital input Active-low receiver enable
VCC 8 8 Supply 3-V to 3.6-V supply

Bare Die Information

DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD
METALLIZATION COMPOSITION
15 mils. Silicon with backgrind GND Cu-Ni-Pd

Bond Pad Coordinates in Microns - Rev A

DESCRIPTION(1) PAD NUMBER a b c d
R 1 69.3 372.15 185.3 489.15
~RE 2 388.75 71.5 503.75 186.5
DNC 3 722.4 55.4 839.4 172.4
DNC 4 891.4 55.4 1008.4 172.4
DE 5 1174.8 71.5 1289.8 186.5
DNC 6 1754.35 65.4 1869.35 180.4
DNC 7 1907.35 65.4 2022.35 180.4
D 8 2280.55 69.5 2395.55 184.5
DNC 9 2733.5 371.5 2848.5 486.5
GND 10 2691 1693.1 2808 1810.1
GND 11 2535 1693.1 2652 1810.1
DNC 12 2253.45 1685.65 2368.45 1800.65
A 13 1961.55 1693.1 2078.55 1810.1
B 14 799.55 1693.1 916.55 1810.1
DNC 15 498.35 1681.2 613.35 1796.2
VCC 16 244.8 1668.5 359.8 1783.5
VCC 17 91.8 1668.5 206.8 1783.5
(1) DNC = Do Not Connect
SN65HVD11-HT pad_lls934.gif