SLLSEJ8E June   2014  – April 2019 SN65HVD1470 , SN65HVD1471 , SN65HVD1473 , SN65HVD1474 , SN65HVD1476 , SN65HVD1477

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Block Diagram
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions — SOIC-8 and MSOP-8
    2.     Pin Functions — MSOP–10
    3.     Pin Functions — SOIC-14
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information — D Packages
    5. 7.5  Thermal Information — DGS and DGK Packages
    6. 7.6  Power Dissipation
    7. 7.7  Electrical Characteristics
    8. 7.8  Switching Characteristics — 400 kbps
    9. 7.9  Switching Characteristics — 20 Mbps
    10. 7.10 Switching Characteristics — 50 Mbps
    11. 7.11 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Equivalent Circuits
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1.      Master Enable Control
      2.      Slave Enable Control
      3. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Failsafe
        5. 10.2.1.5 Transient Protection
      4. 10.2.2 Detailed Design Procedure
      5. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Parameter Measurement Information

The input generator rate is 100 kbps with 50% duty cycle, than 6-ns rise and fall times, and 50-Ω output impedance.

SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_01_sllsej8.gifFigure 15. Measurement of Driver Differential Output Voltage With Common-Mode Load
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_02_sllsej8.gifFigure 16. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_03_sllsej8.gifFigure 17. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_04_sllsej8.gif
D at 3 V to test non-inverting output, D at 0 V to test inverting output.
Figure 18. Measurement of Driver Enable and Disable Times with Active-High Output and Pulldown Load
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_05_sllsej8.gif
D at 0 V to test non-inverting output, D at 3 V to test inverting output.
Figure 19. Measurement of Driver Enable and Disable Times with Active-Low Output and Pullup Load
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_06_sllsej8.gifFigure 20. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_07_sllsej8.gifFigure 21. Measurement of Receiver Enable and Disable Times With Driver Enabled
SN65HVD1470 SN65HVD1471 SN65HVD1473 SN65HVD1474 SN65HVD1476 SN65HVD1477 pmi_08_sllsej8.gifFigure 22. Measurement of Receiver Enable Times With Driver Disabled