SLLSE49E September 2010 – October 2024 SN65HVD1780-Q1 , SN65HVD1781-Q1 , SN65HVD1782-Q1
PRODUCTION DATA
When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D. A logic high at D causes A to turn high and B to turn low. In this case the differential output voltage defined as VOD = VA – VB is positive. When D is low, the output states reverse, B turns high, A becomes low, and VOD is negative.
When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled, output A turns high and B turns low.
INPUT | ENABLE | OUTPUTS | DRIVER STATE | |
---|---|---|---|---|
D | DE | A | B | |
H | H | H | L | Actively drive bus High |
L | H | L | H | Actively drive bus Low |
X | L | Z | Z | Driver disabled |
X | OPEN | Z | Z | Driver disabled by default |
OPEN | H | H | L | Actively drive bus High by default |
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and lower than the negative input threshold, VIT–, the receiver output, R, turns low. If VID is between VIT+ and VIT– the output is indeterminate.
When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).
DIFFERENTIAL INPUT | ENABLE | OUTPUT | RECEIVER STATE |
---|---|---|---|
VID = VA – VB | RE | R | |
VID > VIT+ | L | H | Receive valid bus High |
VIT– < VID < VIT+ | L | ? | Indeterminate bus state |
VID < VIT– | L | L | Receive valid bus Low |
X | H | Z | Receiver disabled |
X | OPEN | Z | Receiver disabled by default |
Open-circuit bus | L | H | Fail-safe high output |
Short-circuit bus | L | H | Fail-safe high output |
Idle (terminated) bus | L | H | Fail-safe high output |