SLLS872J January   2008  – March 2023 SN65HVD1785 , SN65HVD1786 , SN65HVD1787 , SN65HVD1791 , SN65HVD1792 , SN65HVD1793

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Product Selection Guide
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings (1)
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Thermal Considerations
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Hot-Plugging
      2. 9.3.2 Receiver Failsafe
      3. 9.3.3 70-V Fault-Protection
      4. 9.3.4 Additional Options
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Receiver Failsafe
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-A9CC716B-44AA-4F89-9CEA-C245A1BC918C-low.gifFigure 6-1 D or P Package
8-Pin SOIC or PDIP
SN65HVD1785, 1786, 1787 (Top View)
Pin Functions (SN65HVD1785, SN65HVD1786, SN65HVD1787)
PIN TYPE DESCRIPTION
NAME NO.
A 6 Bus input/output Driver output or receiver input (complementary to B)
B 7 Bus input/output Driver output or receiver input (complementary to A)
D 4 Digital input Driver data input
DE 3 Digital input Driver enable, active high
GND 5 Reference potential Local device ground
R 1 Digital output Receive data output
RE 2 Digital input Receiver enable, active low
VCC 8 Supply 4.5-V-to-5.5-V supply
GUID-33E7AF44-328A-4E61-99C3-5A9011DC7ABB-low.gif
NC - No internal connection
Pins 6 and 7 are connected together internally.
Pins 13 and 14 are connected together internally.
Figure 6-2 D Package
14-Pin SOIC
SN65VD1791, 1792, 1793 (Top View)
Pin Functions (SN65HVD1791, SN65HVD1792, SN65HVD1793)
PIN TYPE DESCRIPTION
NAME NO.
A 12 Bus input Receiver input (complementary to B)
B 11 Bus input Receiver input (complementary to A)
Y 9 Bus output Driver output (complementary to Z)
Z 10 Bus output Driver output (complementary to Y)
D 5 Digital input Driver data input
DE 4 Digital input Driver enable, active high
GND 6, 7 Reference potential Local device ground
R 2 Digital output Receive data output
RE 3 Digital input Receiver enable, active low
VCC 13, 14 Supply 4.5-V to 5.5-V supply
NC 1, 8 No connect No connect; should be left floating