SLOS346O MARCH   2001  – April 2018 SN65HVD230 , SN65HVD231 , SN65HVD232

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Equivalent Input and Output Schematic Diagrams
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics: Driver
    6. 8.6  Electrical Characteristics: Receiver
    7. 8.7  Switching Characteristics: Driver
    8. 8.8  Switching Characteristics: Receiver
    9. 8.9  Switching Characteristics: Device
    10. 8.10 Device Control-Pin Characteristics
    11. 8.11 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Vref Voltage Reference
      2. 10.3.2 Thermal Shutdown
    4. 10.4 Device Functional Modes
      1. 10.4.1 High-Speed Mode
      2. 10.4.2 Slope Control Mode
      3. 10.4.3 Standby Mode (Listen Only Mode) of the HVD230
      4. 10.4.4 The Babbling Idiot Protection of the HVD230
      5. 10.4.5 Sleep Mode of the HVD231
      6. 10.4.6 Summary of Device Operating Modes
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 CAN Bus States
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 CAN Termination
        2. 11.2.1.2 Loop Propagation Delay
        3. 11.2.1.3 Bus Loading, Length and Number of Nodes
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Transient Protection
        2. 11.2.2.2 Transient Voltage Suppressors
      3. 11.2.3 Application Curve
    3. 11.3 System Example
      1. 11.3.1 ISO 11898 Compliance of SN65HVD23x Family of 3.3 V CAN Transceivers
        1. 11.3.1.1 Introduction
        2. 11.3.1.2 Differential Signal
          1. 11.3.1.2.1 Common Mode Signal
        3. 11.3.1.3 Interoperability of 3.3-V CAN in 5-V CAN Systems
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Related Links
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 Community Resources
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6 Electrical Characteristics: Receiver

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going input threshold voltage See Table 1 750 900 mV
VIT- Negative-going input threshold voltage 500 650 mV
Vhys Hysteresis voltage (VIT+ – VIT–) 100
VOH High-level output voltage –6 V ≤ VID ≤ 500 mV, IO = –8 mA, See Figure 22 2.4 V
VOL Low-level output voltage 900 mV ≤ VID ≤ 6 V, IO = 8 mA, See Figure 22 0.4
II Bus input current VIH = 7 V Other input at 0 V,
D = 3 V		 100 250 μA
VIH = 7 V, VCC = 0 V 100 350
VIH = -2 V –200 –30 μA
VIH = -2 V, VCC = 0 V –100 –20
CI CANH, CANL input capacitance Pin-to-ground,
VI = 0.4 sin(4E6πt) + 0.5 V		 V(D) = 3 V, 32 pF
CDiff Differential input capacitance Pin-to-pin,
VI = 0.4 sin(4E6πt) + 0.5 V		 V(D) = 3 V, 16 pF
RDiff Differential input resistance Pin-to-pin, V(D) = 3 V 40 70 100 kΩ
RI CANH, CANL input resistance 20 35 50 kΩ
ICC Supply current See driver
(1) All typical values are at 25°C and with a 3.3-V supply.