SLLS557H November   2002  – November 2018 SN65HVD233 , SN65HVD234 , SN65HVD235

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Block Diagram
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Power Dissipation Ratings
    6. 8.6  Electrical Characteristics: Driver
    7. 8.7  Electrical Characteristics: Receiver
    8. 8.8  Switching Characteristics: Driver
    9. 8.9  Switching Characteristics: Receiver
    10. 8.10 Switching Characteristics: Device
    11. 8.11 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagrams
    3. 10.3 Feature Description
      1. 10.3.1 Diagnostic Loopback (SN65HVD233)
      2. 10.3.2 Autobaud Loopback (SN65HVD235)
      3. 10.3.3 Slope Control
      4. 10.3.4 Standby
      5. 10.3.5 Thermal Shutdown
    4. 10.4 Device Functional Modes
      1. 10.4.1 Driver and Receiver
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Bus Loading, Length and Number of Nodes
        2. 11.2.1.2 CAN Termination
      2. 11.2.2 Detailed Design Procedure
      3. 11.2.3 Application Curve
    3. 11.3 System Example
      1. 11.3.1 ISO 11898 Compliance of SN65HVD23x Family of 3.3-V CAN Transceivers
        1. 11.3.1.1 Introduction
        2. 11.3.1.2 Differential Signal
        3. 11.3.1.3 Common-Mode Signal
        4. 11.3.1.4 Interoperability of 3.3-V CAN in 5-V CAN Systems
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Related Links
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 Community Resources
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Thermal Information

over operating free-air temperature range (unless otherwise noted)
PARAMETERS TEST CONDITIONS VALUE UNIT
RθJA Junction-to-ambient thermal resistance(1) Low-K(2) board, no air flow 185 °C/W
High-K(3) board, no air flow 101
RθJB Junction-to-board thermal resistance High-K(3) board, no air flow 82.8 °C/W
RθJC Junction-to-case thermal resistance 26.5 °C/W
P(AVG) Average power dissipation RL = 60 Ω, RS at 0 V, input to D a 1-MHz 50% duty
cycle square wave VCC at 3.3 V, TA = 25°C		 36.4 mW
T(SD) Thermal shutdown junction temperature 170 °C
(1) See SZZA003 for an explanation of this parameter.
(2) JESD51-3 low effective thermal conductivity test board for leaded surface mount packages.
(3) JESD51-7 high effective thermal conductivity test board for leaded surface mount packages.