SLLS552 Data sheet

SLLS552G December 2002 – September 2022 SN65HVD20 , SN65HVD21 , SN65HVD22 , SN65HVD23 , SN65HVD24

PRODUCTION DATA

8.9 Receiver Equalization Characteristics

over recommended operating conditions (unless otherwise noted)⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS				TYP	UNIT
t_j(pp)	Peak-to-peak eye-pattern jitter	Peudo-random NRZ code with a bit pattern length of 2¹⁶ – 1, Beldon 3105A cable, See Figure 10-2	25 Mbps	0 m	SN65HVD23	2	ns
				100 m	SN65HVD20	6	ns
				100 m	SN65HVD23	3	ns
				150 m	SN65HVD20	15	ns
				150 m	SN65HVD23	4	ns
				200 m	SN65HVD20	27	ns
				200 m	SN65HVD23	8	ns
			10 Mbps	200 m	SN65HVD20	22	ns
				200 m	SN65HVD23	8	ns
				250 m	SN65HVD20	34	ns
				250 m	SN65HVD23	15	ns
				300 m	SN65HVD20	49	ns
				300 m	SN65HVD23	27	ns
			5 Mbps	500 m	SN65HVD21	128	ns
			5 Mbps	500 m	SN65HVD24	18	ns
			3 Mbps	500 m	SN65HVD20	93	ns
					SN65HVD21	103
					SN65HVD23	90
					SN65HVD24	16
			1 Mbps	1000 m	SN65HVD21	216	ns
			1 Mbps	1000 m	SN65HVD24	62	ns

(1) The SN65HVD20 and SN65HVD21 do not have receiver equalization, but are specified for comparison.

(2) All typical values are at V_CC = 5 V, and temperature = 25°C.