SLLSEI3A September   2013  – November 2015 SN65HVD265 , SN65HVD266 , SN65HVD267

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configurations and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings: AEC
    3. 7.3 ESD Ratings: IEC
    4. 7.4 Transient Protection
    5. 7.5 Recommended Operating Conditions
    6. 7.6 Thermal Information
    7. 7.7 Electrical Characteristics
    8. 7.8 Switching Characteristics
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 TXD Dominant Timeout (DTO)
        1. 9.3.1.1 RXD Dominant Timeout (SN65HVD267)
        2. 9.3.1.2 Thermal Shutdown
        3. 9.3.1.3 Undervoltage Lockout
        4. 9.3.1.4 Fault Terminal (SN65HVD267)
        5. 9.3.1.5 Unpowered Device
        6. 9.3.1.6 Floating Terminals
        7. 9.3.1.7 CAN Bus Short Circuit Current Limiting
    4. 9.4 Device Functional Modes
      1. 9.4.1 Can Bus States
      2. 9.4.2 Normal Mode
      3. 9.4.3 Silent Mode
      4. 9.4.4 Driver and Receiver Function Tables
      5. 9.4.5 Digital Inputs and Outputs
        1. 9.4.5.1 5-V VCC Only Devices (SN65HVD265 and SN65HVD267)
        2. 9.4.5.2 5-V VCC with VRXD RXD Output Supply Devices (SN65HVD266)
        3. 9.4.5.3 5-V VCC with FAULT Open-Drain Output Device (SN65HVD267)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length and Number of Nodes
      2. 10.2.2 Detailed Design Procedures
        1. 10.2.2.1 CAN Termination
        2. 10.2.2.2 Functional Safety Using the SN65HVD267 in a Redundant Physical Layer CAN Network Topology
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Parameter Measurement Information

SN65HVD265 SN65HVD266 SN65HVD267 test_rxd-dom_timeout_llsea2.gif Figure 2. RXD Dominant Timeout Test Circuit and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 test_fault_257_llsea2.gif Figure 3. FAULT Test and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 dvr_tst_cir_llsea2.gif Figure 4. Driver Test Circuit and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 rx_tst_cir_llsea2.gif Figure 5. Receiver Test Circuit and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 tmode_tst_cir_llsea2.gif Figure 6. tMODE Test Circuit and Measurement

Table 1. Receiver Differential Input Voltage Threshold Test

INPUT OUTPUT
VCANH VCANL |VID| RXD
-1.1V -2.0 V 900 mV L VOL
7.0 V 6.1 V 900 mV L
-1.5 V -2.0 V 500 mV H VOH
7.0 V 6.5 V 500 mV H
Open Open X H
SN65HVD265 SN65HVD266 SN65HVD267 tprop_tst_cir_llsea2.gif Figure 7. TPROP(LOOP) Test Circuit and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 LoopSymmetryFD_SLLSEA2.gif
Note: tLOOP is equivalent to tPROP(LOOP) from CAN timing.
Figure 8. Loop Delay Symmetry Test Circuit and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 txd_tim_tst_llsea2.gif Figure 9. TXD Dominant Timeout Test Circuit and Measurement
SN65HVD265 SN65HVD266 SN65HVD267 dvr_short_cir_tst_llsea2.gif Figure 10. Driver Short Circuit Current Test and Measurement