SLLS562O august   2009  – july 2023 SN65HVD3082E , SN65HVD3085E , SN65HVD3088E , SN75HVD3082E

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information, SN65HVD308xE
    5. 6.5  Thermal Information, SNx5HVD3082E
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics: Driver
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Fail-safe
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Usage in an RS-485 Transceiver
        2. 9.2.2.2 Low-Power Shutdown Mode
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations for IC Packages
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Thermal Information, SNx5HVD3082E

THERMAL METRIC(1) SN65HVD3082E, SN75HVD3082E
SN65HVD3082E UNIT
D (SOIC) DGK (VSSOP) P (PDIP)
8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 114.4 142.2 88.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 55.1 35.8 65.9 °C/W
RθJB Junction-to-board thermal resistance 61.6 75.6 69.0 °C/W
ψJT Junction-to-top characterization parameter 8.8 0.8 35.2 °C/W
ψJB Junction-to-board characterization parameter 60.8 74.8 64.3 °C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.