SLLSE94C September   2011  – March 2015 SN65HVD62

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Block Diagram
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Thermal Information
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Driver Amplitude Adjust
      2. 10.1.2 Direction Control
      3. 10.1.3 Direction Control Time Constant
      4. 10.1.4 Conversion Between dBm and Peak-to-peak Voltage
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.1.1 Driver Amplitude Adjust

The SN65HVD62 can provide up to 2.5 V peak-to-peak of output signal at the TXOUT pin to compensate for potential loss within the external filter, cable, connections, and termination. External resistors are used to set the amplitude of the modulated driver output signal. Resistors connected across RES and BIAS set the output amplitude. The maximum peak-to-peak voltage at TXOUT is 2.5 V, corresponding to +6 dBm on the coaxial cable. The TXOUT voltage level can be adjusted by choice of resistors to set the voltage at the RES pin. according to the following equation:

Equation 1. VTXOUT (VP-P) = (2.5 VP-P x VRES (V))/1.5 V VRES (V) = 1.5 V x R2/(R1 + R2) VTXOUT (VP-P) = 2.5 VP-P x R2/(R1 + R2).

The voltage at the RES pin should be between 0.7 V and 1.5 V. Connect RES directly to the BIAS (R1 = 0 Ω) for maximum output level of 2.5 V peak-to-peak. This gives a minimum voltage level at TXOUT of 1.2 V peak-to-peak, corresponding to about 0 dBm at the coaxial cable. A 1 μF capacitor should be connected between the BIAS pin and GND. To obtain a nominal power level of +3 dBm at the feeder cable as the AISG standard requires, use R1 = 4.1k Ω and R2 = 10k Ω that provide 1.78 VP-P at TXOUT.

10.1.2 Direction Control

In many applications the mast-top modem which receives data from the base will then distribute the received data through an RS-485 network to several mast-top devices. When the mast-top modem receives the first logic 0 bit (active modulated signal) it will take control of the mast-top RS-485 network by asserting the Direction Control signal. The duration of the Direction Control assertion should be optimized to pass a complete message of length B bits at the known signaling rate (1/tBIT) before relinquishing control of the mast-top RS-485 network. For example, if the messages are 10 bits in length (B=10) and the signaling rate is 9600 bits per second (tBIT = 0.104 msec) then a positive pulse of duration 1.7 msec is sufficient (with margin to allow for network propagation delays) to enable the mast-top RS-485 drivers to distribute each received message.

SN65HVD62 direct_cont_llse94.gif

10.1.3 Direction Control Time Constant

The time constant for the Direction Control function can be set by the Control Mode pins, DIRSET1/DIRSET2. These pins should be set to correspond to the desired data rate. With no external connections to the Control Mode pins, the internal time constant is set to the maximum value, corresponding to the minimum data rate.

10.1.4 Conversion Between dBm and Peak-to-peak Voltage

Equation 2. dBm = 20 × LOG10 [Volts-pp / SQRT(0.008 × Zo)] = 20 × LOG10 [Volts-pp / 0.63] for Zo = 50 Ω
Equation 3. Volts-pp = SQRT(0.008 × Zo) × 10(dBm/20) = 0.63 × 10(dBm/20) for Zo = 50 Ω

The following table shows conversions between dBm and peak-to-peak voltage with 50 Ω load, for various levels of interest including reference levels from the 3GPP TS 25.461 Technical Specification.

SIGNAL ON COAX (Iuant Layer 1) dBm Vpp (V)
Maximum Driver ON Signal 5 1.12
Nominal Driver ON Signal 3 0.89
Minimum Driver ON Signal 1 0.71
AISG Maximum Receiver Threshold –12 0.16
Nominal Receiver Threshold –15 0.11
Minimum Receiver Threshold –18 0.08
Maximum Driver OFF Signal –40 0.006