SLLSFI7 October   2020 SN65HVD64

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Coaxial Interface
      2. 8.3.2 Reference Input
      3. 8.3.3 RS-485 Direction Control
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Driver Amplitude Adjust
      2. 9.1.2 Direction Control
      3. 9.1.3 Direction Control Time Constant
      4. 9.1.4 Conversion Between dBm and Peak-to-Peak Voltage
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
ICC Supply current DIRSET1 = L
DIRSET2 = H		 TXIN = L (active) 28 33 mA
TXIN = H (quiescent) 25 31
TXIN = 115 kbps,
50% duty cycle		 27 33
DIRSET1 = H, DIRSET2 = H (standby) 12 17
IVL Logic supply current TXIN = H, RXIN = DC input 50 µA
PSRR Receiver power supply rejection ratio VTXIN = VL 45 60 dB
TSD_RISE Thermal shutdown rising 143 156 170 °C
TSD_FALL Thermal shutdown falling 123 136 147 °C
TSD_HYS Thermal shutdown hysteresis 18 20 23 °C
LOGIC PINS
VOH High-level logic output voltage
(RXOUT, DIR)		 IOH = –4 mA for VL > 2.4 V,
IOH = –2 mA for VL < 2.4 V		 90%VVL V
VOL Low-level logic output voltage
(RXOUT, DIR)		 IOL = 4 mA for VL > 2.4 V,
IOL = 2 mA for