SLLSEH3C July 2013 – January 2018 SN65HVD888
PRODUCTION DATA.
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
VCC | Supply voltage | –0.5 | 7 | V | |
Input voltage at any logic pin | –0.3 | 5.7 | V | ||
Voltage input, transient pulse, A and B, through 100 Ω | –100 | 100 | V | ||
Voltage at A or B inputs | –18 | 18 | V | ||
Receiver output current | –24 | 24 | mA | ||
Continuous total-power dissipation | See (Thermal Information) table | ||||
TJ | Junction temperature | 170 | °C | ||
TSTG | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±8000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 | |||
Machine model (MM) | ±100 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | IEC 61000-4-2 ESD (Contact Discharge), bus terminals and GND | ±12000 | V |
IEC 61000-4-4 EFT (Fast transient or burst) bus terminals and GND | ±4000 | |||
IEC 60749-26 ESD (HBM), bus terminals and GND | ±16000 |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
VCC | Supply voltage | 4.5 | 5 | 5.5 | V | |
VID | Differential input voltage | –12 | 12 | V | ||
VI | Input voltage at any bus terminal (separate or common mode)(1) | –7 | 12 | V | ||
VIH | High-level input voltage (driver, driver-enable, and receiver-enable inputs) | 2 | VCC | V | ||
VIL | Low-level input voltage (driver, driver-enable, and receiver-enable inputs) | 0 | 0.8 | V | ||
IO | Output current | Driver | –60 | 60 | mA | |
Receiver | –8 | 8 | ||||
CL | Differential load capacitance | 50 | pF | |||
RL | Differential load resistance | 60 | Ω | |||
1/tUI | Signaling rate | 0.3 | 250 | kbps | ||
TJ | Junction temperature | –40 | 150 | °C | ||
TA(2) | Operating free-air temperature (see Thermal Information for additional information) | –40 | 125 | °C |
THERMAL METRIC(1) | SN65HVD888 | UNIT | |
---|---|---|---|
D (SOIC) | |||
8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 116.1 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 60.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 57.1 | °C/W |
ψJT | Junction-to-top characterization parameter | 13.9 | °C/W |
ψJB | Junction-to-board characterization parameter | 56.5 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
│VOD│ | Driver differential-output voltage magnitude | RL = 60 Ω, 375 Ω on each output from –7 to +12 V | See Figure 4 | 1.5 | 2.5 | V | |
RL = 54 Ω (RS-485) | See Figure 5 | 1.5 | 2.5 | ||||
RL = 100 Ω (RS-422) | 2 | 3 | |||||
Δ│VOD│ | Change in magnitude of driver differential-output voltage | RL = 54 Ω, CL = 50 pF | See Figure 5 | –0.2 | 0 | 0.2 | V |
VOC(SS) | Steady-state common-mode output voltage | Center of two 27-Ω load resistors | See Figure 5 | 1 | VCC / 2 | 3 | V |
ΔVOC | Change in differential driver common-mode output voltage | Center of two 27-Ω load resistors | See Figure 5 | –0.2 | 0 | 0.2 | mV |
VOC(PP) | Peak-to-peak driver common-mode output voltage | Center of two 27-Ω load resistors | See Figure 5 | 850 | mV | ||
COD | Differential output capacitance | 8 | pF | ||||
VIT+ | Positive-going receiver differential-input voltage threshold | 35 | 100 | mV | |||
VIT– | Negative-going receiver differential-input voltage threshold | –100 | –35 | mV | |||
VHYS(1) | Receiver differential-input voltage threshold hysteresis (VIT+ – VIT– ) | 40 | 60 | mV | |||
VOH | Receiver high-level output voltage | IOH = –8 mA | 2.4 | VCC – 0.3 | V | ||
VOL | Receiver low-level output voltage | IOL = 8 mA | 0.2 | 0.4 | V | ||
II | Driver input, driver enable, and receiver enable input current | –2 | 2 | µA | |||
IOZ | Receiver high-impedance output current | VO = 0 V or VCC, RE at VCC | –10 | 10 | µA | ||
│IOS│ | Driver short-circuit output current | │IOS│ with VA or VB from –7 to +12 V | 150 | mA | |||
II | Bus input current (driver disabled) | VCC = 4.5 to 5.5 V or | VI = 12 V | 75 | 125 | µA | |
VCC = 0 V, DE at 0 V | VI = –7 V | –100 | –40 | ||||
ICC | Supply current (quiescent) –40°C to 85°C |
Driver and receiver enabled | DE = VCC, RE = GND, No load |
750 | 900 | µA | |
Driver enabled, receiver disabled | DE = VCC, RE = VCC, No load |
650 | |||||
Driver disabled, receiver enabled | DE = GND, RE = GND, No load |
750 | |||||
Driver and receiver disabled | DE = GND, D = GND RE = VCC, No load |
0.4 | 5 | ||||
ICC | Supply current (quiescent) –40°C to 125°C |
Driver and receiver enabled | DE = VCC, RE = GND, No load |
750 | 990 | µA | |
Driver enabled, receiver disabled | DE = VCC, RE = VCC, No load |
715 | |||||
Driver disabled, receiver enabled | DE = GND, RE = GND, No load |
825 | |||||
Supply current (dynamic) | See Figure 3 |
PARAMETER | TEST CONDITIONS | VALUE | UNIT | |||
---|---|---|---|---|---|---|
PD | Power Dissipation driver and receiver enabled, VCC = 5.5 V, TJ = 150°C 50% duty cycle square-wave signal at 250 kbps signaling rate: |
Unterminated | RL = 300 Ω, CL = 50 pF (driver) |
164 | mW | |
RS-422 load | RL = 100 Ω, CL = 50 pF (driver) |
247 | ||||
RS-485 load | RL = 54 Ω, CL = 50 pF (driver) |
316 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
DRIVER | |||||||
tr, tf | Driver differential-output rise and fall times | RL = 54 Ω, CL = 50 pF | See Figure 6 | 400 | 700 | 1200 | ns |
tPHL, tPLH | Driver propagation delay | RL = 54 Ω, CL = 50 pF | See Figure 6 | 90 | 700 | 1000 | ns |
tSK(P) | Driver pulse skew, |tPHL – tPLH| | RL = 54 Ω, CL = 50 pF | See Figure 6 | 25 | 200 | ns | |
tPHZ, tPLZ | Driver disable time | See Figure 7 and Figure 8 | 50 | 500 | ns | ||
tPHZ, tPLZ | Driver enable time | Receiver enabled | See Figure 7 and Figure 8 | 500 | 1000 | ns | |
Receiver disabled | See Figure 7 and Figure 8 | 3 | 9 | µs | |||
RECEIVER | |||||||
tr, tf | Receiver output rise and fall times | CL = 15 pF | See Figure 9 | 18 | 30 | ns | |
tPHL, tPLH | Receiver propagation delay time | CL = 15 pF | See Figure 9 | 85 | 195 | ns | |
tSK(P) | Receiver pulse skew, |tPHL – tPLH| | CL = 15 pF | See Figure 9 | 1 | 15 | ns | |
tPHZ, tPLZ | Receiver disable time | 50 | 500 | ||||
tPZL(1), tPZH(1)
tPZL(2), tPZH(2) |
Receiver enable time | Driver enabled | See Figure 10 | 20 | 130 | ns | |
Driver disabled | See Figure 11 | 2 | 8 | µs | |||
tFS | Bus failsafe time | Driver disabled | See Figure 12 | 44 | 58 | 76 | ms |