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DATA SHEET
SN65HVDA100-Q1 LIN Physical Interface
1 Features
- AEC-Q100 (Grade 1) qualified for automotive applications
- Compliant with LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A, and ISO/DIS 17987-4 electrical physical layer (EPL) specification
- Extended operation with supply from 5 V to 27 V DC
- LIN Transmits speed up to 20-kbps (LIN specified maximum), high-speed receive capable
- Sleep mode: ultra-low current consumption allows wake-up events from:
- LIN bus
- wake-up through EN
- Wake-up request on RXD pin
- Wake-up source recognition on TXD pin
- Interfaces to MCU with 5-V or 3.3-V I/O pins
- High electromagnetic compatibility (EMC)
- Control of external voltage regulator (INH Pin)
- Supports ISO9141 (K-line)
- ESD protection to ±12 kV (human body model) on LIN pin
- LIN pin handles voltage from –27 V to 45 V (short to battery or ground)
- Survives transient damage in automotive environment (ISO 7637)
- Undervoltage protection on VSUP
- TXD dominant state time-out protection
- Prevention of false wakeups with false wake-up lockout
- Thermal shutdown
- Unpowered node or ground disconnection failsafe at system level, node does not disturb bus (no load on bus)
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