SLASEE6 September   2016 SN65HVS883

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Input Characteristics
    9. 6.9 Typical Voltage Regulator Performance Characteristics
  7. Parameter Measurement Information
    1. 7.1 Waveforms
    2. 7.2 Signal Conventions
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Digital Inputs
      2. 8.3.2 Debounce Filter
      3. 8.3.3 Shift Register
      4. 8.3.4 Voltage Regulator
      5. 8.3.5 Supply Voltage Monitor
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 System-Level EMC
      2. 9.1.2 Input Channel Switching Characteristics
      3. 9.1.3 Digital Interface Timing
      4. 9.1.4 Cascading for High Channel Count Input Modules
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Stage
        2. 9.2.2.2 Setting Debounce Time
        3. 9.2.2.3 Example: High-Voltage Sensing Application
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PWP Package
28 Pin (HTSSOP) With Exposed Thermal Pad
Top View

Pin Functions

PIN DESCRIPTION
PIN NO. NAME
1, 2 DB0, DB1 Debounce select inputs
3, 5, 7, 9,
11, 18, 20, 22
IPx Input channel x
4, 6, 8, 10,
12, 17, 19, 21
REx Return path x (LED drive)
13 RLIM Current limiting resistor
14 V24 24 VDC field supply
15 5VOP 5 V output to supply low-power isolators
16 CHOK Chip okay indicator output
23 SOP Serial data output
24 CE Clock enable input
25 CLK Serial clock input
26 LD Load pulse input
27 SIP Serial data input
28 FGND Field ground