SLLS447D October   2000  – April 2024 SN65LBC172A , SN75LBC172A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Dissipation Rating Table
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Device Functional Modes
      1. 7.1.1 Function Table
      2. 7.1.2 Equivalent Input and Output Schematic Diagrams
  9. 8 Application and Implementation
    1. 8.1 Application Information
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|16
  • N|16
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.7 Switching Characteristics

over recommended operating conditions
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
tPLHPropagation delay time, low-to-high level outputRL = 54Ω, CL = 50pF, see Figure 6-45.5811ns
tPHLPropagation delay time, high-to-low level output5.5811ns
trDifferential output voltage rise time

2

7.511ns
tfDifferential output voltage fall time

2

7.511ns
tsk(p)Pulse skew |tPLH – tPHL|0.62ns
tsk(o)Output skew(1)2ns
tsk(pp)Part-to-part skew(2)3ns
tPZHPropagation delay time, high-impedance-to-high-level outputSee Figure 6-525ns
tPHZPropagation delay time, high-level-output-to-high impedance25ns
tPZLPropagation delay time, high-impedance-to-low-level outputSee Figure 6-630ns
tPLZPropagation delay time, low-level-output-to-high impedance20ns
(1) Output skew (tsk(o)) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together.
(2) Part-to-part skew (tsk(pp)) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test circuits.