SLLS575A
AUGUST 2003 – July 2015
SN65LVDS049
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Device Electrical Characteristics
6.6
Switching Characteristics
6.7
Dissipation Rating
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Driver Offset
8.3.2
Receiver Open Circuit Fail-Safe
8.3.3
Receiver Common-Mode Range
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Point-to-Point Communications
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Bypass Capacitance
9.2.1.2.2
Driver Supply Voltage
9.2.1.2.3
Driver Input Voltage
9.2.1.2.4
Driver Output Voltage
9.2.1.2.5
Interconnecting Media
9.2.1.2.6
PCB Transmission Lines
9.2.1.2.7
Termination Resistor
9.2.1.2.8
Receiver Supply Voltage
9.2.1.2.9
Receiver Input Common-Mode Range
9.2.1.2.10
Receiver Input Signal
9.2.1.2.11
Receiver Output Signal
9.2.1.3
Application Curve
9.2.2
Multidrop Communications
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.2.1
Interconnecting Media
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Microstrip vs. Stripline Topologies
11.1.2
Dielectric Type and Board Construction
11.1.3
Recommended Stack Layout
11.1.4
Separation Between Traces
11.1.5
Crosstalk and Ground Bounce Minimization
11.1.6
Decoupling
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slls575a_oa
slls575a_pm
7 Parameter Measurement Information
Figure 1. Driver V
OD
and V
OS
Test Circuit
Figure 2. Driver Propagation Delay and Rise and Fall Time Test Circuit and Waveforms
Figure 3. Driver High-Impedance State Delay Test Circuit and Waveforms
Figure 4. Receiver Propagation Delay and Rise and Fall Test Circuit and Waveforms
Figure 5. Receiver High-Impedance State Delay Test Circuit and Waveforms
(V
CC
= 3.3 V)