SLLS575A AUGUST   2003  – July 2015 SN65LVDS049

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Device Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Dissipation Rating
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Driver Offset
      2. 8.3.2 Receiver Open Circuit Fail-Safe
      3. 8.3.3 Receiver Common-Mode Range
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Point-to-Point Communications
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Bypass Capacitance
          2. 9.2.1.2.2  Driver Supply Voltage
          3. 9.2.1.2.3  Driver Input Voltage
          4. 9.2.1.2.4  Driver Output Voltage
          5. 9.2.1.2.5  Interconnecting Media
          6. 9.2.1.2.6  PCB Transmission Lines
          7. 9.2.1.2.7  Termination Resistor
          8. 9.2.1.2.8  Receiver Supply Voltage
          9. 9.2.1.2.9  Receiver Input Common-Mode Range
          10. 9.2.1.2.10 Receiver Input Signal
          11. 9.2.1.2.11 Receiver Output Signal
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Multidrop Communications
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Interconnecting Media
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

PW Package (Marked as LVDS049)
16-Pin TSSOP
(Top View)
SN65LVDS049 po_lls575.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 13 – Ground
DIN1 10 I LVTTL input signals
DIN2 11
DOUT1+ 7 O Differential (LVDS) noninverting output
DOUT2+ 6
DOUT1– 8 O Differential (LVDS) inverting output
DOUT2– 5
EN 16 I Driver and receiver enable
EN 9 I Driver and receiver inverse-enable
RIN1+ 2 I Differential (LVDS) noninverting input
RIN2+ 3
RIN1– 1 I Differential (LVDS) inverting input
RIN2– 4
ROUT1 15 O LVTTL output signals
ROUT2 14
VCC 12 – Supply voltage