SLLSF42A March 2018 – May 2018 SN65LVDS93B-Q1
PRODUCTION DATA.
The SN65LVDS93B-Q1 takes in three (or four) data words each containing seven single-ended data bits and converts this to an LVDS serial output. Each serial output runs at seven times that of the parallel data rate. The deserializer (receiver) device operates in the reverse manner. The three (or four) LVDS serial inputs are transformed back to the original seven-bit parallel single-ended data. Additional TI solutions are available in 21:3 or 28:4 SerDes ratios.