SLLSF55A March   2018  – May 2018 SN65LVDS93B

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      RGB Video System Using Discrete LVDS TX
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 TTL Input Data
      2. 9.3.2 LVDS Output Data
    4. 9.4 Device Functional Modes
      1. 9.4.1 Input Clock Edge
      2. 9.4.2 Low Power Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Power
        2. 10.2.2.2 Signal Connectivity
        3. 10.2.2.3 PCB Routing
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Board Stackup
      2. 12.1.2 Power and Ground Planes
      3. 12.1.3 Traces, Vias, and Other PCB Components
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN NOM MAX UNIT
Supply voltage, VCC 3 3.3 3.6 V
LVDS output supply voltage, LVDSVCC 3 3.3 3.6
PLL analog supply voltage, PLLVCC 3 3.3 3.6
IO input reference supply voltage, IOVCC 1.62 1.8 / 2.5 / 3.3 3.6
Power supply noise on any VCC terminal 0.1
High-level input voltage, VIH IOVCC = 1.8 V IOVCC/2 + 0.3 V V
IOVCC = 2.5 V IOVCC/2 + 0.4 V
IOVCC = 3.3 V IOVCC/2 + 0.5 V
Low-level input voltage, VIL IOVCC = 1.8 V IOVCC/2 – 0.3 V V
IOVCC = 2.5 V IOVCC/2 – 0.4 V
IOVCC = 3.3 V IOVCC/2 – 0.5 V
Differential load impedance, ZL 90 132 Ω
Operating free-air temperature, TA –45 85 °C