SLLS902A
February 2010 – March 2024
SN65MLVD040
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
Reccommended Operationg Conditions
5.3
Thermal Characteristics
5.4
Package Dissipation Ratings
5.5
Device Electrical Characteristics
5.6
Driver Electrical Characteristics
5.7
Reciver Electrical Charecteristics
5.8
Bus Input and Output Electrical Characteristics
5.9
Driver Switching Characterisitics
5.10
Reciever Switching Charecteristics
5.11
Typical Characteristics
6
Paramater Measurement Information
6.1
Equivalent Input and Output Schematic Diagrams
7
Application and Implementation
7.1
Application Information
7.1.1
Source Synchronous System Clock (SSSC)
7.1.1.1
Live Insertion/Glitch-Free Power Up/Down
8
Device and Documentation Support
8.1
Documentation Support
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGZ|48
MPQF123F
Thermal pad, mechanical data (Package|Pins)
RGZ|48
QFND014T
Orderable Information
slls902a_oa
slls902a_pm
Data Sheet
SN65MLVD040 4-Channel Half-Duplex M-LVDS Line Transceivers