SLLS573E December   2003  – March 2024 SN65MLVD200A , SN65MLVD202A , SN65MLVD204A , SN65MLVD205A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Electrical Characteristics – Driver
    7. 6.7  Electrical Characteristics – Receiver
    8. 6.8  Electrical Characteristics – BUS Input and Output
    9. 6.9  Switching Characteristics – Driver
    10. 6.10 Switching Characteristics – Receiver
    11. 6.11 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-On Reset
      2. 8.3.2 ESD Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Function Tables
      2. 8.4.2 Equivalent Input and Output Schematic Diagrams
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Supply Voltage
        2. 9.2.2.2  Supply Bypass Capacitance
        3. 9.2.2.3  Driver Input Voltage
        4. 9.2.2.4  Driver Output Voltage
        5. 9.2.2.5  Termination Resistors
        6. 9.2.2.6  Receiver Input Signal
        7. 9.2.2.7  Receiver Input Threshold (Failsafe)
        8. 9.2.2.8  Receiver Output Signal
        9. 9.2.2.9  Interconnecting Media
        10. 9.2.2.10 PCB Transmission Lines
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip Versus Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Electrical Characteristics – Driver

over recommended operating conditions unless otherwise noted
PARAMETERTEST CONDITIONSMIN(1)TYP(2)MAXUNIT
|VAB| or
|VYZ|		Differential output voltage magnitudeSee Figure 7-2480650mV
Δ|VAB| or
Δ|VYZ|		Change in differential output voltage magnitude between logic states–5050mV
VOS(SS)Steady-state common-mode output voltageSee Figure 7-30.81.2V
ΔVOS(SS)Change in steady-state common-mode output voltage between logic states–5050mV
VOS(PP)Peak-to-peak common-mode output voltage150mV
VY(OC) or
VA(OC)		Maximum steady-state open-circuit output voltageSee Figure 7-702.4V
VZ(OC) or
VB(OC)		Maximum steady-state open-circuit output voltage02.4V
VP(H)Voltage overshoot, low-to-high level outputSee Figure 7-51.2 VSSV
VP(L)Voltage overshoot, high-to-low level output–0.2 VSSV
IIHHigh-level input current (D, DE)VIH = 2 V to VCC010µA
IILLow-level input current (D, DE)VIL = GND to 0.8 V010µA
|IOS|Differential short-circuit output current magnitudeSee Figure 6-424mA
IOZHigh-impedance state output current (driver only)–1.4 V ≤ (VY or VZ) ≤ 3.8 V,
Other output = 1.2 V		–1510µA
IO(OFF)Power-off output current–1.4 V ≤ (VY or VZ) ≤ 3.8 V, Other output = 1.2 V, 0 V ≤ VCC≤ 1.5 V–1010µA
CY or CZOutput capacitanceVI = 0.4 sin(30E6πt) + 0.5 V,(3)
Other input at 1.2 V, driver disabled		3pF
CYZDifferential output capacitanceVAB = 0.4 sin(30E6πt) V, (3)
Driver disabled		2.5pF
CY/ZOutput capacitance balance, (CY/CZ)0.991.01
(1) The algebraic convention in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
(2) All typical values are at 25°C and with a 3.3-V supply voltage.
(3) HP4194A impedance analyzer (or equivalent)