SLLSEX9A December 2016 – February 2020 SN65MLVD206B
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN(1) | TYP(2) | MAX | UNIT | |
---|---|---|---|---|---|---|
|VAB|
|
Differential output voltage magnitude (3) | See Figure 3 | 480 | 650 | mV | |
Δ|VAB|
|
Change in differential output voltage magnitude between logic states | –50 | 50 | mV | ||
VOS(SS) | Steady-state common-mode output voltage | See Figure 4 | 0.8 | 1.2 | V | |
ΔVOS(SS) | Change in steady-state common-mode output voltage between logic states | –50 | 50 | mV | ||
VOS(PP) | Peak-to-peak common-mode output voltage | 150 | mV | |||
VA(OC) |
Maximum steady-state open-circuit output voltage | See Figure 8 | 0 | 2.4 | V | |
VB(OC) |
Maximum steady-state open-circuit output voltage | 0 | 2.4 | V | ||
VP(H) | Voltage overshoot, low-to-high level output | See Figure 6 | 1.2 VSS | V | ||
VP(L) | Voltage overshoot, high-to-low level output | –0.2 VSS | V | |||
IIH | High-level input current (D, DE) | VIH = 2 V to VCC | 0 | 10 | µA | |
IIL | Low-level input current (D, DE) | VIL = GND to 0.8 V | 0 | 10 | µA | |
|IOS| | Differential short-circuit output current magnitude | See Figure 5 | 24 | mA |