SCASE12 June 2024 SN74AC238-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The SN74AC238-Q1 is a high speed silicon gate CMOS decoder that is an excellent choice for memory address decoding or data routing applications. It contains a single 3:8 decoder.
The SN74AC238-Q1 has three address select inputs (A2, A1, and A0). The circuit functions as a normal one-of-eight decoder.
Three strobe inputs (G2, G1 and G0) are provided to simplify cascading and to facilitate demultiplexing. When any input strobe is active, all outputs are forced into the low state.
The demultiplexing function is accomplished by first using the select inputs to choose the desired output, and then using one of the strobe inputs as the data input.
The outputs for the SN74AC238-Q1 are normally low, and high when selected.