SCASE15
September 2024
SN74AC3G97
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Balanced CMOS Push-Pull Outputs
7.3.2
CMOS Schmitt-Trigger Inputs
7.3.3
Clamp Diode Structure
7.4
Device Functional Modes
7.5
Combinatorial Logic Configurations
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.1.1
Power Considerations
8.2.1.2
Input Considerations
8.2.1.3
Output Considerations
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.2.4
Power Supply Recommendations
8.2.5
Layout
8.2.5.1
Layout Guidelines
8.2.5.2
Layout Example
9
Device and Documentation Support
9.1
Receiving Notification of Documentation Updates
9.2
Support Resources
9.3
Trademarks
9.4
Electrostatic Discharge Caution
9.5
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Tape and Reel Information
11.2
Mechanical Data
Package Options
Mechanical Data (Package|Pins)
BQA|14
MPQF538A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scase15_oa
2
Applications
Combine power good signals
Combine enable signals
Eliminate slow or noisy input signals
Synchronize inverted clock inputs
Debounce a switch
Use fewer inputs to monitor error signals
Data selection
Multiplexing