SCLS996A January   2024  – April 2024 SN74AC595-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Switching Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
    3. 8.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • BQB|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The SN74AC595-Q1 contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. This configuration allows data to be loaded into the shift register while the outputs remain static. The device includes 3-state outputs to allow for disabling the outputs. The device has a separate shift register output (QH') for connecting shift registers in series.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)BODY SIZE(3)
SN74AC595-Q1PW (TSSOP, 16)5mm × 6.4mm5mm × 4.4mm
BQB (WQFN, 16) 3.5mm × 2.5mm 3.5mm × 2.5mm
(1) For more information, see Section 11.
(2) The package size (length x width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
GUID-20211015-SS0I-66P0-J2PR-6DVV9SDRTXZD-low.gif Logic Diagram (Positive Logic)