SCAS784B October   2004  – July 2024 SN74ACT10-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics
    6. 4.6 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

2 Description

The SN74ACT10 device contains three independent 3-input NAND gates. The device performs the Boolean functions Y = A • B • C or Y = A + B + C in positive logic.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74ACT10-Q1 PW (TSSOP, 14) 5mm x 6.4mm 5mm x 4.4mm
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
SN74ACT10-Q1 Logic Diagram, Each Gate (Positive Logic) Logic Diagram, Each Gate (Positive Logic)