SCAS530D August   1995  – July 2024 SN74ACT32

PRODUCTION DATA  

  1.   1
  2. Features
  3. Description
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics
    6. 4.6 Operating Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • DB|14
  • PW|14
  • N|14
  • NS|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC TA = 25°C SN74ACT32 UNIT
MIN TYP MAX MIN MAX
VOH IOH = –50 µA 4.5 V 4.4 4.4 V
5.5 V 5.4 5.4
IOH = –24 mA 4.5 V 3.86 3.76
5.5 V 4.86 4.76
IOH = –50 mA (1) 5.5 V
IOH = –75 mA (1) 5.5 V 3.85
VOL IOL = 50 µA 4.5 V 0.001 0.1 0.1 V
5.5 V 0.001 0.1 0.1
IOL = 24 mA 5.5 V 0.36 0.44
5.5 V 0.36 0.44
IOL = 50 mA (1) 5.5 V
IOL = 75 mA (1) 5.5 V 1.65
II VI = VCC or GND 5.5 V ±0.1 ±1 µA
ICC VI = VCC or GND, IO = 0 5.5 V 2 20 µA
ΔICC (2) One input at 3.4 V, Other inputs at VCC or GND 5.5 V 0.6 1.5 mA
Ci VI = VCC or GND 5 V 2.6 pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.