SCASE38 November   2024 SN74ACT3G99-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Combinatorial Logic Configurations
    4. 7.4 Feature Description
      1. 7.4.1 Balanced CMOS 3-State Outputs
      2. 7.4.2 TTL-Compatible Schmitt-Trigger CMOS Inputs
      3. 7.4.3 Wettable Flanks
      4. 7.4.4 Clamp Diode Structure
    5.     24
    6. 7.5 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

SN74ACT3G99-Q1 PW or DGS Package, 20-Pin TSSOP or VSSOP (Top View)Figure 4-1 PW or DGS Package, 20-Pin TSSOP or VSSOP (Top View)
SN74ACT3G99-Q1 RKS Package, 20-Pin VQFN (Transparent Top View)Figure 4-2 RKS Package, 20-Pin VQFN (Transparent Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
OE1 1 I Output enable input for Channel 1, active-low
A1 2 I Channel 1, Input A
B1 3 I Channel 1, Input B
OE2 4 I Output enable input for Channel 2, active-low
A2 5 I Channel 2, Input A
B2 6 I Channel 2, Input B
Y2 7 O Channel 2, Output Y
D2 8 I Channel 2, Input D
C2 9 I Channel 2, Input C
GND 10 G Ground
C3 11 I Channel 3, Input C
D3 12 I Channel 3, Input D
Y3 13 O Channel 3, Output Y
B3 14 I Channel 3, Input B
A3 15 I Channel 3, Input A
OE3 16 I Output enable input for Channel 3, active-low
C1 17 I Channel 1, Input C
D1 18 I Channel 1, Input D
Y1 19 O Channel 1, Output Y
VCC 20 P Positive supply
Thermal Pad(2) — The thermal pad can be connect to GND or left floating. Do not connect to any other signal or supply.
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power
(2) RKS package only.