SCASE38 November   2024 SN74ACT3G99-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Combinatorial Logic Configurations
    4. 7.4 Feature Description
      1. 7.4.1 Balanced CMOS 3-State Outputs
      2. 7.4.2 TTL-Compatible Schmitt-Trigger CMOS Inputs
      3. 7.4.3 Wettable Flanks
      4. 7.4.4 Clamp Diode Structure
    5.     24
    6. 7.5 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS VCC -40°C to 125°C UNIT
MIN TYP MAX
VT+ Positive-going input threshold voltage 4.5V 1.28 1.58 1.83 V
5V 1.37 1.67 1.93
5.5V 1.46 1.76 2.02
VT- Negative-going input threshold voltage 4.5V 0.65 0.93 1.2 V
5V 0.68 0.98 1.25
5.5V 0.71 1.01 1.29
ΔVT Hysteresis (VT+ − VT−) 4.5V 0.51 0.64 0.75 V
5V 0.55 0.69 0.81
5.5V 0.59 0.74 0.88
VOH IOH = -50µA 4.5V 4.4 4.499 V
5.5V 5.4 5.499
IOH = -24mA 4.5V 3.7
IOH = -24mA 5.5V 4.7
IOH = -75mA(3) 5.5V 3.85
VOL IOL = 50µA 4.5V 0.001 0.1 V
5.5V 0.001 0.1
IOL = 24mA 4.5V 0.5
IOL = 24mA 5.5V 0.5
IOL = 75mA(3) 5.5V 1.65
II VI = 5.5V or GND 0V to 5.5V ±1 µA
IOZ VO = VCC or GND 5.5V ±1 µA
ICC VI = VCC or GND, IO = 0 5.5V 2 µA
ΔICC VI = VCC – 2.1V; Any Input 4.5V to 5.5V 200 µA
CI VI = VCC or GND 5V 2 pF
CO VO = VCC or GND 5V 4 pF
CPD(1)(2) CL = 50pF, F = 1MHz 5V 57 pF
(1) CPD is used to determine the dynamic power consumption, per channel
(2) PD= VCC2xFIx(CPD+ CL) where FI= input frequency, CL= output load capacitance, VCC= supply voltage
(3) Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.