SCAS973 March   2024 SN74ACT7541-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Open-Drain CMOS Outputs
      2. 7.3.2 TTL-Compatible CMOS Inputs
      3. 7.3.3 Wettable Flanks
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Design Requirements
      1. 8.3.1 Power Considerations
      2. 8.3.2 Input Considerations
      3. 8.3.3 Output Considerations
    4. 8.4 Detailed Design Procedure
    5. 8.5 Application Curves
    6. 8.6 Power Supply Recommendations
    7. 8.7 Layout
      1. 8.7.1 Layout Guidelines
      2. 8.7.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
Specification Description Condition MIN MAX UNIT
VCC Supply voltage 4.5 5.5 V
VIH High-level input voltage 4.5V ≤ VCC ≤ 5.5V 2 V
VIL Low-Level input voltage 4.5V ≤ VCC ≤ 5.5V 0.8 V
VI(1) Input Voltage 0 VCC V
VO Output Voltage 0 VCC V
IOH High-level output current 4.5V ≤ VCC ≤ 5.5V -24 mA
IOL Low-level output current 4.5V ≤ VCC ≤ 5.5V 24 mA
Δt/Δv Input transition rise or fall rate 4.5V ≤ VCC ≤ 5.5V 20 ns/V
TA Operating free-air temperature -40 125 °C
(1) All unused inputs of the device must be held at a valid high or low voltage level for proper device operation. Refer to the TI application report Implications of Slow or Floating CMOS Inputs.