SGDS015A February   2002  – December 2024 SN74AHC125Q

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 Thermal Information
    4. 4.4 Electrical Characteristics
    5. 4.5 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    6. 4.6 Switching Characteristics, VCC = 5 V ± 0.5 V
    7. 4.7 Noise Characteristics
    8. 4.8 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Documentation
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Receiving Notification of Documentation Updates
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Pin Configuration and Functions

SN74AHC125Q D or PW Package, 14-Pin SOIC or TSSOP (Top View)Figure 3-1 D or PW Package, 14-Pin SOIC or TSSOP (Top View)
Table 3-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
1 OE 1 I Output enable
1A 2 I Input
1Y 3 O Output
2 OE 4 I Output enable
2A 5 I Input
2Y 6 O Output
3 OE 8 I Output enable
3A 9 I Input
3Y 10 I Output
4 OE 13 I Output enable
4A 12 I Input
4Y 11 O Output
GND 7 — Ground
VCC 14 I Supply voltage
(1) I = input, O = output