SCLS955A
August 2023 – October 2023
SN74AHC1G126-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Standard CMOS Inputs
8.3.2
Balanced CMOS 3-State Outputs
8.3.3
Clamp Diode Structure
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Power Considerations
9.2.1.2
Input Considerations
9.2.1.3
Output Considerations
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Documentation Support
10.1.1
Related Documentation
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|5
MPDS025J
DBV|5
MPDS018T
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scls955a_oa
scls955a_pm
1
Features
AEC-Q100 qualified for automotive applications:
Device temperature grade 1: -40°C to +125°C
Device HBM ESD classification level 2
Device CDM ESD classification level C4B
Operating range of 2-V to 5.5-V
Low power consumption, 10-µA maximum I
CC
±8-mA output drive at 5 V
Latch-up performance exceeds 250 mA
per JESD 17