SCLS526C July   2003  – July 2024 SN74AHC244-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Switching Characteristics
    8. 4.8 Noise Characteristics
    9. 4.9 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
    3. 7.3 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Pin Configuration and Functions

SN74AHC244-Q1 DW or PW Package, 20-Pin SOIC or TSSOP (Top View) Figure 3-1 DW or PW Package, 20-Pin SOIC or TSSOP (Top View)
Table 3-1 Pin Functions
PIN I/O DESCRIPTION
NO. NAME
1 1 OE I Output Enable 1
2 1A1 I 1A1 Input
3 2Y4 O 2Y4 Output
4 1A2 I 1A2 Input
5 2Y3 O 2Y3 Output
6 1A3 I 1A3 Input
7 2Y2 O 2Y2 Output
8 1A4 I 1A4 Input
9 2Y1 O 2Y1 Output
10 GND — Ground pin
11 2A1 I 2A1 Input
12 1Y4 O 1Y4 Output
13 2A2 I 2A2 Input
14 1Y3 O 1Y3 Output
15 2A3 I 2A3 Input
16 1Y2 O 1Y2 Output
17 2A4 I 2A4 Input
18 1Y1 O 1Y1 Output
19 2 OE I Output Enable 2
20 VCC — Power Pin