SCLS419H June 1998 – July 2024 SN74AHCT174
PRODMIX
Refer to the PDF data sheet for device specific package drawings
Information at the data (D) inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.