SCLS252O October   1995  – July 2024 SN54AHCT240 , SN74AHCT240

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Noise Characteristics
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  7.   Parameter Measurement Information
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • NS|20
  • N|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Switching Characteristics

over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Section 6 section)
PARAMETERTEST CONDITIONSTA = 25°CSN54AHCT240–40°C to 85°C
SN74AHCT240		–40°C to 125°C
SN74AHCT240		UNIT
TYPMAXMINMAXMINMAXMINMAX
tPLHPropagation delay time
(low-to-high output)		A-to-YCL = 15 pF5.4(1)7.4(1)1(1)8.5(1)18.519.5ns
tPHLPropagation delay time
(high-to-low output)		5.4(1)7.4(1)1(1)8.5(1)18.519.5
tPZHEnable time
(to the high level)		OE-to-YCL = 15 pF7.7(1)10.4(1)1(1)12(1)112113ns
tPZLEnable time
(to the low level)		7.7(1)10.4(1)1(1)12(1)112113
tPHZDisable time
(from high level)		OE-to-YCL = 15 pF8.3(1)10.4(1)1(1)12(1)112113ns
tPLZDisable time
(from low level)		8.3(1)10.4(1)1(1)12(1)112113
tPLHPropagation delay time
(low-to-high output)		A-to-YCL = 50 pF5.98.419.519.5110.5ns
tPHLPropagation delay time
(high-to-low output)		5.98.419.519.5110.5
tPZHEnable time
(to the high level)		OE-to-YCL = 50 pF8.211.4113113114ns
tPZLEnable time
(to the low level)		8.211.4113113114
tPHZDisable time
(from high level)		OE-to-YCL = 50 pF8.811.4113113114ns
tPLZDisable time
(from low level)		8.811.4113113114
tsk(o)Skew (time), outputCL = 50 pF1(2)111ns
(1) On products compliant to MIL-PRF-38535, this parameter is not production tested.
(2) On products compliant to MIL-PRF-38535, this parameter does not apply.