SCLS528D July   2003  – February 2024 SN74AHCT32-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Noise Characteristics
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|14
  • PW|14
  • BQA|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The SN74AHCT32 is a quadruple 2-input positive-OR gate. This device performs the Boolean function Y = A × B or Y = A + B in positive logic.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2) BODY SIZE(3)
SN74AHCT32-Q1 D (SOIC, 14) 8.7mm × 6mm 8.7mm × 3.9mm
PW (TSSOP, 14) 5mm × 6.4mm 5mm × 4.4mm
BQA (WQFN, 14) 3mm × 2.5mm 3mm × 2.5mm
(1) For more information, see Section 11.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
(3) The body size (length × width) is a nominal value and does not include pins.
GUID-20230206-SS0I-GQWB-BX8R-N2MCLLTLDLNJ-low.png(1)Logic Symbol
GUID-C9DBA5B1-E30D-44EE-ACFD-AC59389CC0F5-low.gifLogic Diagram, Each Gate (Positive Logic)
1. The † symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12