SCES383L March   2002  – January 2018 SN74AUC1G126

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Logic Diagram (Positive Logic)
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics: CL = 15 pF
    7. 6.7 Switching Characteristics: CL = 30 pF
    8. 6.8 Operating Characteristics
  7. Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Balanced CMOS Push-Pull Outputs
      2. 9.3.2 Standard CMOS Inputs
      3. 9.3.3 Negative Clamping Diodes
      4. 9.3.4 Special Features
        1. 9.3.4.1 Partial Power Down (Ioff)
        2. 9.3.4.2 Overvoltage Tolerant Inputs
        3. 9.3.4.3 Output Enable
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
  • DCK|5
  • YZP|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
VCC Supply voltage 0.8 2.7 V
VIH High-level input voltage VCC = 0.8 V VCC V
VCC = 1.1 V to 1.95 V 0.65 × VCC
VCC = 2.3 V to 2.7 V 1.7
VIL Low-level input voltage VCC = 0.8 V 0 V
VCC = 1.1 V to 1.95 V 0.35 × VCC
VCC = 2.3 V to 2.7 V 0.7
VI Input voltage 0 3.6 V
VO Output voltage 0 VCC V
IOH High-level output current VCC = 0.8 V –0.7 mA
VCC = 1.1 V –3
VCC = 1.4 V –5
VCC = 1.65 V –8
VCC = 2.3 V –9
IOL Low-level output current VCC = 0.8 V 0.7 mA
VCC = 1.1 V 3
VCC = 1.4 V 5
VCC = 1.65 V 8
VCC = 2.3 V 9
Δt/Δv Input transition rise or fall rate VCC = 0.8 V to 1.6 V 20 ns/V
VCC = 1.65 V to 1.95 V 10
VCC = 2.3 V to 2.7 V 3
TA Operating free-air temperature –40 85 °C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See Implications of Slow or Floating CMOS Inputs application report.