SN74AUP1G08 Low-Power Single 2-Input Positive-AND Gate

1 Features

Available in the Ultra Small 0.64mm² Package (DPW) With 0.5mm Pitch
Low Static-Power Consumption:
I_CC = 0.9μA Maximum
Low Dynamic-Power Consumption:
C_pd = 4.3pF Typical at 3.3V
Low Input Capacitance: C_i = 1.5pF Typical
Low Noise: Overshoot and Undershoot
<10% of V_CC
I_off Supports Live Insertion, Partial-Power-Down
Mode, and Back Drive Protection
Schmitt-Trigger Action Allows Slow Input Transition and Better Switching Noise Immunity at the Input (V_hys = 250 mV Typical at 3.3V)
Wide Operating V_CC Range of 0.8V to 3.6V
Optimized for 3.3V Operation
3.6V I/O Tolerant to Support Mixed-Mode Signal Operation
t_pd = 4.3ns Maximum at 3.3V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000V Human-Body Model
  (A114-B, Class II)
- 1000V Charged-Device Model (C101)
Simplified Schematic