SCES803A April   2010  – June 2015 SN74AUP1T17

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCC = 2.5 V and VI = 1.8 V
    7. 6.7  Switching Characteristics, VCC = 2.5 V and VI = 2.5 V
    8. 6.8  Switching Characteristics, VCC = 2.5 V and VI = 3.3 V
    9. 6.9  Switching Characteristics, VCC = 3.3 V and VI = 1.8 V
    10. 6.10 Switching Characteristics, VCC = 3.3 V and VI = 2.5 V
    11. 6.11 Switching Characteristics, VCC = 3.3 V and VI = 3.3 V
    12. 6.12 Operating Characteristics
    13. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74AUP1T17 is a low-power CMOS device that can be used for a multitude of buffer type functions where the input is slow or noisy. The inputs are 5.5-V tolerant allowing it to translate down to VCC. In addition, the device can translate a signal up to VCC when the input is at least VT+ (max).

9.2 Typical Application

This application is for a low-cost oscillator. The SN74AUP1T17 at the output cleans up the noise from the clock generator so that it can be used in the system.

SN74AUP1T17 aup1t17_appschem.gifFigure 3. Low-Cost Oscillator

9.2.1 Design Requirements

This device uses CMOS technology and has balanced output drive. Take care to avoid bus contention because it can drive currents that would exceed maximum limits. The high drive will also create fast edges into light loads so routing and load conditions should be considered to prevent ringing.

9.2.2 Detailed Design Procedure

  1. Recommended Input Conditions
  2. Recommend Output Conditions
    • Load currents should not exceed (IO max) per output and should not exceed (continuous current through VCC or GND) total current for the part. These limits are located in the Absolute Maximum Ratings table.
    • Outputs should not be pulled above VCC.

9.2.3 Application Curves

Figure 4 and Figure 5 show the power consumption with the AUP family.

SN74AUP1T17 aup1_ces612.gif
(1) Single, dual, and triple gates
Figure 4. Static-Power Consumption (µA)
SN74AUP1T17 aup2_ces612.gif
(1) Single, dual, and triple gates
Figure 5. Dynamic-Power Consumption (pF)