SCES841F
June 2012 – April 2018
SN74AUP1T34
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Example Application
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: DC
6.6
Electrical Characteristics: AC
6.7
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Fully Configurable Dual-Rail Design
8.3.2
Partial-Power-Down Mode Operation
8.3.3
VCC Isolation
8.3.4
Input Hysteresis
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Support Resources
12.2
Trademarks
12.3
Electrostatic Discharge Caution
12.4
Glossary
13
Mechanical, Packaging, and Orderable Information
13.1
Package Option Addendum
13.1.1
Packaging Information
Package Options
Mechanical Data (Package|Pins)
DRY|6
MPDS221F
DSF|6
MPDS301G
DCK|5
MPDS025J
Thermal pad, mechanical data (Package|Pins)
DRY|6
QFND138E
Orderable Information
sces841f_pm
9.2.3
Application Curve
Figure 5.
10-MHz Up Translation (0.9 V to 3.6 V)